Hot Pages: Software Caching for Raw Microprocessors

This paper describes Hot Pages, a software solution for managing on-chip data on the Raw Machine, a scalable, parallel, microprocessor architecture. This software system transparently manages the mapping between the program address space and on-chip memory. Hot Pages combines compile time information to selectively virtualize memory references and to eliminate many cachetag lookups. For many of the memory accesses that cannot be fully predicted, Hot Pages replaces the cache-tag lookups with simple register comparisons by reusing translated virtual page descriptions from earlier nearby memory references. Hot Pages implements a multi-bank memory structure, allowing multiple references in parallel, to provide memory bandwidth matched to the computational resources on the Raw microprocessor. Because virtualization is handled in software rather than hardware, the system is easier to test, it is more predictable, and provides the flexibility of application specific customized caching solutions. For the applications studied the Hot Pages system eliminates in average more than 90% of the cache-tag lookups and could be applied to reduce the power required for data caching. The performance of Hot Pages scales with added processors and for many applications is comparable with that of hardware solutions. Hot Pages is a credible new foundation for caching, opening up a new dimension for research in additional application specific software caching optimizations.